Prior work has established the effectiveness of reuse distance analysis in predicting whole-program locality and miss rates. In this talk, we show that reuse distance can also effectively predict locality and miss rates on a per instruction basis. Rather than predict locality by analyzing reuse distances for memory addresses alone, we relate those addresses to particular static memory operations and predict the locality of each instruction.
Our experiments show that using reuse distance without cache simulation to predict miss rates of instructions is superior to using cache simulations on a single representative data set to predict miss rates on various data sizes. In addition, our analysis allows us to identify the critical memory operations that are likely to produce a significant number of cache misses for a given data size. With this information, compilers can target cache optimization specifically to the instructions that can benefit from such optimizations most.
Bio: Dr. Steve Carr is a Professor of Computer Science in the Department of Computer Science at Michigan Technological University. His research focuses on memory hierarchy performance using static and dynamic compiler analysis, and compiler/micro-architecture cooperation. Dr. Carr is a recipient of a National Science Foundation Information Technology Research award (ITR) and has served on numerous conference committees. In addition, Dr. Carr is a co-author of a paper on register allocation for array variables that was selected as one of the 50 most influential papers published in the ACM Conference on programming Language Design and Implementation between 1979 and 1999.