Abstract: In this talk, I will first focus on my research on designing energy-optimized high performance memory hierarchies using compression. In multicore processor systems, last-level caches (LLCs) play a crucial role in reducing system energy by i) filtering out expensive accesses to main memory and ii) reducing the time spent executing in high-power states. Increasing the LLC size can improve system performance and energy by reducing memory accesses, but at the cost of high area and power overheads.
Cache compression is a promising technique for expanding effective cache capacity with little area overhead. Compressed caches can achieve the benefits of larger caches using the area and power of smaller caches by fitting more cache blocks in the same cache space. I have proposed three novel compressed cache designs that are optimized for energy: Decoupled Compressed Cache (DCC), Skewed Compressed Cache (SCC), and Yet Another Compressed Cache (YACC). In addition, I present my study on compression benefits for real applications running on real machines. In the second part of my talk, I will focus on industrial work experience.
Bio: Dr. Somayeh Sardashti earned her PhD degree in Computer Sciences from University of Wisconsin-Madison in May 2015. Her research interests include computer systems and architecture. Her PhD research has focused on identifying the sources of energy inefficiencies in computer systems, and proposing new directions to tackle these challenges. Somayeh has published several conference and journal papers on her research, including two papers in International Symposium on Microarchitecture, one IEEE Micro Top Picks, and one book. She has served as reviewer and committee member for many conferences and journals. Somayeh currently works in Exadata Database Machine team at Oracle Corporation. In her time at Oracle, she has been focusing on software-hardware co-design solutions, particularly in storage and network, to run mission-critical OLTP and analytics database applications.