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Computer Science @ Rochester
Thursday, September 29, 2011
9:00 AM
Computer Studies Bldg. Room 632
Hongzhou Zhao
University of Rochester
Application-Directed Memory Metadata Design
State-of-the-art memory system designs typically fix parameters at design time to simplify the underlying hardware implementation and management. Memory is divided into fixed size blocks, and each block when cached has associated with it the identity address tag and coherence metadata. Applications, on the other hand, often demonstrate access and sharing granularity that is both dynamic and data-structure specific, resulting in poor cache utilization, and wasted energy and communication.

In this proposal, we leverage application data access and sharing behavior to tailor the design of both identity and coherence metadata to the application in order to improve storage efficiency. We show how a coherence directory decoupling the sharing pattern from cache lines compresses coherence metadata, allowing coherence to scale to a larger number of cores. We also propose a variable cache line size design that adjusts individual cache line sizes to match the locality specific to different applications and data structures within applications. The identity metadata required to manage the system is thus a function of an application's spatial locality. The result is a memory hierarchy with improved cache utilization and lower bandwidth demands.