PhD Thesis Defense Xiaowan Dong University of Rochester
Toward Efficient and Protected Address Translation in Memory Management
Memory management support on state-of-the-art architectures and operating systems (OS) encounters both performance and protection challenges for today's applications and execution environments. From a performance perspective, a variety of services, ranging from compilers to web user-interface frameworks, which provide the infrastructure for many high-level applications, suffer from performance degradation due to instruction address translation overheads. From a protection perspective, attackers can leverage address translation information to steal confidential data via privileged side-channel attacks.
In this dissertation, (1) we explore the efficacy of different OS-level approaches to automatically reduce instruction address translation overhead for widely-used mobile, desktop, and server applications, including automatic superpage promotion and sharing page table and translation lookaside buffer (TLB) entries; and (2) we propose defenses against page table and last-level cache (LLC) side-channel attacks by privileged code and explore mitigations against bounds check bypass attacks launched by a compromised OS.
Advisor: Prof. Sandhya Dwarkadas (Computer Science)
Committee members: Prof. John Criswell (Computer Science), Dr. Kai Shen (Google), and Prof. Alan Cox (Rice University)