Power consumption has emerged as a significant design constraint, along with throughput, area, and accuracy (operand precision), in computing systems. This concern has been accelerated by the growing popularity of wireless systems, but exists even in high performance, tethered systems since circuit cooling requirements affect packaging costs and circuit reliability. Next generation designers forecast that future microprocessors could consume hundreds of watts unless further advances are made in low power design. Power optimizations can be made at the circuit level, gate level, architecture level, and software level. This tutorial will cover this entire design spectrum - from "soup to nuts" - concentrating in particular on architecture and software power design issues and t switching activity is largely determined by the software running on the system.
Assumed attendee background is a intermediate to advanced background in computer architecture design, a beginner to intermediate background in the area of compiler optimizations, and a beginner background in circuit level design.
Mary Jane Irwin is a Distinguished Professor of Computer Science and Engineering at Penn State. Her current research and teaching interests include computer architecture, computer arithmetic, VLSI systems design, low power design, and electronic design automation. She is an elected member of the ACM/SIGARCH Board of Directors. Her complete vitae can be found at www.cse.psu.edu/~mji.
Vijay Narayanan is an Assistant Professor of Computer Science and Engineering at Penn State. His current research and teaching interests include Java Virtual Machine implementation, VLSI systems design, low power design, and parallel processing. His complete vitae can be found at www.cse.psu.edu/~vijay.
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