Mips Instruction Set
Three types of instruction formats.
- Op --- 6 bits for operation code. Implies 64 instructions.
- Rs --- 5 bits source register specifier. Implies 32 registers.
- Rt --- 5 bits source/target register specifier.
- Rd --- 5 bits destination register specifier.
- Sa --- 5 bits shift amount.
- Funct --- 6 bits function field.
- Immediate --- 16 bits immediate value, address displacement, or
branch displacement.
- target --- 26 bits jump target address.
Important Instructions and some Issues
- Arithmetic Instructions --- Overflow.
- Logical Instructions --- Nothing can go wrong.
- Control Flow --- Condition Codes, PC relative addressing, Subroutine Linkage.
- Memory Operations --- Alignment Exceptions
Subroutine Calls and Stacks
Mips Register Conventions
The Mips processor has 32 registers that are general purpose. This
implies that they can be used interchangeably. However, for
programming reasons certain conventions are used in order to determine
what values those registers are expected to contain.
- R0 --- Constant zero.
- R1 --- Reserved for Assembler.
- R2, R3 --- Function Results.
- R4, R5, R6, R7 --- Arguments.
- R8, R9, R10, R11, R12, R13, R14, R15 --- Temporary: Caller Saved.
- R16, R17, R18, R19, R20, R21, R22, R23 --- Temporary: Callee Saved.
- R24, R25 --- Temporary: Caller Saved.
- R26, R27 --- Reserved for the Operating System.
- R28 --- Pointer to the Global Area.
- R29 --- Stack pointer.
- R30 --- Frame pointer.
- R31 --- Return address.