CSC 573 - Topics in Systems for Heterogeneous Architectures (Fall 2017)

Class will be in Wegmans 1009, Tuesdays/Thursdays from 1230 to 1345.

Modern computer systems are increasingly designed as a CPU + accelerator combination, where the accelerator may be a device such as a graphics processing unit (GPU). Many basic systems abstractions such as multiprocessing, virtual memory, I/O, etc., are either poorly supported or not supported at all by these systems. Many open questions remain on how to provide these abstractions on these systems. This course will survey a selection of topics related to efforts at providing programmers of these heterogeneous systems all the abstractions they currently take for granted on the CPU. The focus will be on CPU+GPU systems, although no knowledge of GPUs is necessary. Prior knowledge of computer architecture, operating systems, and programming languages is required. This course will introduce GPU programming, discuss current research papers on relevant topics and require students to design and execute a project.

This semester, the theme will be on providing services to programs running on massively parallel systems.

How each class is run

Each class will discuss a current research paper in the following manner: 30 minutes presentation, 15 minutes Q&A, 45 minutes discussion.

Presentations: Must be original. Use of (paper) authors presentations is not allowed. Use of Powerpoint, etc. is not required, but recommended.

Q&A: Write down all questions you have about the paper on an index card.

Discussion: Use the 3"x4" index cards to submit ideas related to the problem/paper for discussion before class begins (akin to paper submission). One idea per card (one side only). Any number of ideas can be submitted. All ideas will be evaluated and we will discuss only a high-quality subset. Joint ideas are also permitted, but will be held to a higher standard.

Course grading is based on participation in discussion (including number and quality of ideas), and on the project. The majority of the grade (75%) is for the project. Project proposals must be discussed with the instructor. A set of tentative deadlines is Oct 15 (initial proposal draft), Oct 30 (final proposal draft), Nov 15 (initial project review), Dec 1 (final project review).

All students in course (including those sitting-in) must participate in all activities.

Schedule

Date Paper Presenter
Thu Aug 31, 2017 Intro and Class Mechanics Pai
Tue Sep 05, 2017 Intro to Accelerators Pai
Thu Sep 07, 2017 Intro to GPUs II Pai
Memory Management
Tue Sep 12, 2017 Background: Pai
Thu Sep 14, 2017 (A) Huang, X., C. I. Rodrigues, S. Jones, I. Buck, and W. m Hwu. “XMalloc: A Scalable Lock-Free Dynamic Memory Allocator for Many-Core Machines.” In 2010 10th IEEE International Conference on Computer and Information Technology, 1134–39, 2010. doi:10.1109/CIT.2010.206 Singh, A.
Tue Sep 19, 2017 (B) Steinberger, M., M. Kenzel, B. Kainz, and D. Schmalstieg. “ScatterAlloc: Massively Parallel Dynamic Memory Allocation for the GPU.” In 2012 Innovative Parallel Computing (InPar), 1–10, 2012. doi:10.1109/InPar.2012.6339604. Reddy, U.
Thu Sep 21, 2017 (C) Widmer, Sven, Dominik Wodniok, Nicolas Weber, and Michael Goesele. “Fast Dynamic Memory Allocator for Massively Parallel Architectures.” In Proceedings of the 6th Workshop on General Purpose Processor Using Graphics Processing Units, 120–126. GPGPU-6. New York, NY, USA: ACM, 2013. doi:10.1145/2458523.2458535. Cai, W.
Virtual Memory
Tue Sep 26, 2017 Background:
  • Gelado, Isaac, John E. Stone, Javier Cabezas, Sanjay Patel, Nacho Navarro, and Wen-mei W. Hwu. “An Asymmetric Distributed Shared Memory Model for Heterogeneous Parallel Systems.” In Proceedings of the Fifteenth Edition of ASPLOS on Architectural Support for Programming Languages and Operating Systems, 347–358. ASPLOS XV. New York, NY, USA: ACM, 2010. doi:10.1145/1736020.1736059.
  • Jablin, Thomas B., James A. Jablin, Prakash Prabhu, Feng Liu, and David I. August. “Dynamically Managed Data for CPU-GPU Architectures.” In Proceedings of the Tenth International Symposium on Code Generation and Optimization, 165–174. CGO ’12. New York, NY, USA: ACM, 2012. doi:10.1145/2259016.2259038
  • Pai, Sreepathi, R. Govindarajan, and Matthew J. Thazhuthaveetil. “Fast and Efficient Automatic Memory Management for GPUs Using Compiler-Assisted Runtime Coherence Scheme.” In Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques, 33–42. PACT ’12. New York, NY, USA: ACM, 2012. doi:10.1145/2370816.2370824.
  • Landaverde, R., Tiansheng Zhang, A. K. Coskun, and M. Herbordt. “An Investigation of Unified Memory Access Performance in CUDA.” In 2014 IEEE High Performance Extreme Computing Conference (HPEC), 1–6, 2014. doi:10.1109/HPEC.2014.7040988.
Pai
Thu Sep 28, 2017 (E) Pichai, Bharath, Lisa Hsu, and Abhishek Bhattacharjee. “Architectural Support for Address Translation on GPUs: Designing Memory Management Units for CPU/GPUs with Unified Address Spaces.” In Proceedings of the 19th International Conference on Architectural Support for Programming Languages and Operating Systems, 743–758. ASPLOS ’14. New York, NY, USA: ACM, 2014. doi:10.1145/2541940.2541942.
Tue Oct 03, 2017 (F) Power, J., M. D. Hill, and D. A. Wood. “Supporting X86-64 Address Translation for 100s of GPU Lanes.” In 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA), 568–78, 2014. doi:10.1109/HPCA.2014.6835965. Liu, F.
Thu Oct 05, 2017 (G) Zheng, T., D. Nellans, A. Zulfiqar, M. Stephenson, and S. W. Keckler. “Towards High Performance Paged Memory for GPUs.” In 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA), 345–57, 2016. doi:10.1109/HPCA.2016.7446077. Wen, H.
Multitasking
Tue Oct 10, 2017 Background
  • Kato, Shinpei, Karthik Lakshmanan, Ragunathan Rajkumar, and Yutaka Ishikawa. “TimeGraph: GPU Scheduling for Real-Time Multi-Tasking Environments.” In Proceedings of the 2011 USENIX Conference on USENIX Annual Technical Conference, 2–2. USENIXATC’11. Berkeley, CA, USA: USENIX Association, 2011.
  • Adriaens, Jacob T., Katherine Compton, Nam Sung Kim, and Michael J. Schulte. “The Case for GPGPU Spatial Multitasking.” In Proceedings of the 2012 IEEE 18th International Symposium on High-Performance Computer Architecture, 1–12. HPCA ’12. Washington, DC, USA: IEEE Computer Society, 2012. doi:10.1109/HPCA.2012.6168946.
  • Pai, Sreepathi, Matthew J. Thazhuthaveetil, and R. Govindarajan. “Improving GPGPU Concurrency with Elastic Kernels.” In Proceedings of the Eighteenth International Conference on Architectural Support for Programming Languages and Operating Systems, 407–418. ASPLOS ’13. New York, NY, USA: ACM, 2013. doi:10.1145/2451116.2451160.
Pai
Thu Oct 12, 2017 (H) Tanasic, Ivan, Isaac Gelado, Javier Cabezas, Alex Ramirez, Nacho Navarro, and Mateo Valero. “Enabling Preemptive Multiprogramming on GPUs.” In Proceeding of the 41st Annual International Symposium on Computer Architecuture, 193–204. ISCA ’14. Piscataway, NJ, USA: IEEE Press, 2014.
Tue Oct 17, 2017 (I) Park, Jason Jong Kyu, Yongjun Park, and Scott Mahlke. “Chimera: Collaborative Preemption for Multitasking on a Shared GPU.” In Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 593–606. ASPLOS ’15. New York, NY, USA: ACM, 2015. doi:10.1145/2694344.2694346.
Thu Oct 19, 2017 (J) Wu, Bo, Xu Liu, Xiaobo Zhou, and Changjun Jiang. “FLEP: Enabling Flexible and Efficient Preemption on GPUs.” In Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 483–496. ASPLOS ’17. New York, NY, USA: ACM, 2017. doi:10.1145/3037697.3037742 Chen, D.
I/O
Tue Oct 24, 2017 Background Pai
Thu Oct 26, 2017 (K) Silberstein, Mark, Bryan Ford, Idit Keidar, and Emmett Witchel. “GPUfs: Integrating a File System with GPUs.” In Proceedings of the Eighteenth International Conference on Architectural Support for Programming Languages and Operating Systems, 485–498. ASPLOS ’13. New York, NY, USA: ACM, 2013. doi:10.1145/2451116.2451169. Richter, I.
Tue Oct 31, 2017 (L)
  • Kim, Sangman, Seonggu Huh, Yige Hu, Xinya Zhang, Emmett Witchel, Amir Wated, and Mark Silberstein. “GPUnet: Networking Abstractions for GPU Programs.” In Proceedings of the 11th USENIX Conference on Operating Systems Design and Implementation, 201–216. OSDI’14. Berkeley, CA, USA: USENIX Association, 2014. .
  • Silberstein, Mark, Sangman Kim, Seonggu Huh, Xinya Zhang, Yige Hu, Amir Wated, and Emmett Witchel. “GPUnet: Networking Abstractions for GPU Programs.” ACM Trans. Comput. Syst. 34, no. 3 (September 2016): 9:1–9:31. doi:10.1145/2963098.
Beadle, A. H.
Thu Nov 02, 2017 (M) Konstantinos Menychtas, Kai Shen, and Michael L. Scott, "Enabling OS Research by Inferring Interactions in the Black-Box GPU Stack", In Proceedings of the USENIX Annual Technical Conference (USENIX ATC'13), San Jose, CA, June 2013.
Programming Tools
Tue Nov 07, 2017 Background Cancelled Pai
Thu Nov 09, 2017 (N) Stephenson, Mark, Siva Kumar Sastry Hari, Yunsup Lee, Eiman Ebrahimi, Daniel R. Johnson, David Nellans, Mike O’Connor, and Stephen W. Keckler. “Flexible Software Profiling of GPU Architectures.” In Proceedings of the 42Nd Annual International Symposium on Computer Architecture, 185–197. ISCA ’15. New York, NY, USA: ACM, 2015. doi:10.1145/2749469.2750375.
Tue Nov 14, 2017 (O) Li, Pengcheng, Xiaoyu Hu, Dong Chen, Jacob Brock, Hao Luo, Eddy Z. Zhang, and Chen Ding. “LD: Low-Overhead GPU Race Detection Without Access Monitoring.” ACM Trans. Archit. Code Optim. 14, no. 1 (March 2017): 9:1–9:25. doi:10.1145/3046678.
Thu Nov 16, 2017 (P) Newsha Ardalani, Clint Lestourgeon, Karthikeyan Sankaralingam, and Xiaojin Zhu. 2015. Cross-architecture performance prediction (XAPP) using CPU code to predict GPU performance. In Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48). ACM, New York, NY, USA, 725-737. 10.1145/2830772.2830780
Miscellaneous
Tue Nov 21, 2017 (Q) Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, and Krste Asanović. 2014. Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures. In Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-47). IEEE Computer Society, Washington, DC, USA, 101-113. doi:10.1109/MICRO.2014.4
Thu Nov 23, 2017 Thanksgiving (Holiday)
Tue Nov 28, 2017 (R) Guoyang Chen, Yue Zhao, Xipeng Shen, and Huiyang Zhou. 2017. EffiSha: A Software Framework for Enabling Effficient Preemptive Scheduling of GPU. In Proceedings of the 22nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP '17). ACM, New York, NY, USA, 3-16. doi:10.1145/3018743.3018748
Thu Nov 30, 2017 (S) Jingyue Wu, Artem Belevich, Eli Bendersky, Mark Heffernan, Chris Leary, Jacques Pienaar, Bjarke Roune, Rob Springer, Xuetian Weng, and Robert Hundt. 2016. gpucc: an open-source GPGPU compiler. In Proceedings of the 2016 International Symposium on Code Generation and Optimization (CGO '16). ACM, New York, NY, USA, 105-116. doi:10.1145/2854038.2854041
Project
Tue Dec 05, 2017 No paper discussion
Thu Dec 07, 2017 No paper discussion
Tue Dec 12, 2017 No paper discussion