29 April 2014 List of topics every student should know for the final. Overview layered design, centrality of ISA macro architecture of a modern PC powers of ten and two concept of caching the power wall and multicore order-of-magnitude capacities and latencies of levels of the memory hierarchy historical trends (what gets faster faster?) Data binary, hexadecimal; universality of bits binary arithmetic, signed and unsigned; IEEE floating point alignment, endian-ness Assembly ability to read and understand x86 assembler representation of basic control-flow mechanisms (loops, if, switch) stack layout; subroutine calling conventions layout of structs and arrays in memory familiarity with pointers in C Architecture combinational and sequential circuits; clocking CISC & RISC design philosophies basic issues in ISA design: number and kinds of registers, representation of conditions, fixed v. variable-length format, addressing modes principal implementation strategies single big cycle multi-cycle, but single instruction at a time pipelined, superpipelined superscalar, out-of-order, multithreaded hazards and their mitigation interrupts Performance CPU time = # instructions X average CPI X cycle time "performance blockers" in source code Amdahl's Law arithmetic, harmonic, and geometric means ======================================== Storage temporal and spatial locality how caches work associativity, block/line size cache capacity C = B x E x S hit and miss rates and penalties cache-friendly code; thrashing hard disk organization, terminology Linking relocatable and executable object files separate compilation relocation, resolution of external symbols static and dynamic libraries Exceptions interrupts, traps, and faults; kernel and user mode what the hardware does on an exception processes fork & exec; reaping process groups job control: foreground & background, controlling terminal signals setjmp & longjmp VM purposes: independent address space, main memory caching, protection address translation, rights checking TLB; HW & SW reload page table formats: tree, hash table, segment list resident page table -- why needed? address space layout heap management, garbage collection IO and networks system-level and "standard" file IO sockets "listening" connections Concurrency threads (v. processes) atomicity and condition synchronization; semaphores cache coherence