Friday, March 14, 2008
2:00 PM
703
Virendra Marathe
Computer Science - University of Rochester
Improving the Performance of Nonblocking Software Transactional Memory
Transactional Memory (TM) is a promising concurrency control technology that is likely to replace traditionally used mutual exclusion locks in the upcoming multicore era. TM research grew out of research in nonblocking concurrent algorithms. Hence early software TM (STM) systems were all nonblocking. However they incurred high overheads, rendering them largely impractical. More recently, there has been a shift toward blocking implementations of STMs. This has been accompanied by several significant performance optimizations, making blocking STMs far more practical. A general hypothesis has emerged that nonblocking STMs are fundamentally slower than blocking STMs. In this talk I will show that this hypothesis is false, and that nonblocking STMs can approach the performance of, and even outperform, state-of-the-art blocking STMs. I will present several variants of our most recent nonblocking STM that is competitive with state-of-the-art blocking STMs.