Monday, June 06, 2022
11:00 AM
WH 2506;
Ph.D. Thesis Defense
Divya Ojha
University of Rochester
Redesigning Caches to Resist Side Channel Attacks
Timing side channels have long been used to extract cryptographic keys and sensitive documents, and recent research has shown the potential harm they can cause when combined with the speculative properties of modern processors. Side channels in cache and cache like structures are used as disclosure primitives to craft attacks that are capable of leaking information in the presence of security guarantees like memory safety, enclave separation, control-flow integrity, privilege separation, and process isolation.

In this dissertation, we address side channel leaks due to processor state in cache, translation lookaside buffers (TLBs), and coherence directories. The two main types of vulnerabilities in shared states are due to data reuse and contention. Reuse attacks are more precise and rely on sharing memory content, whereas contention attacks can leak information even in the absence of shared memory. This dissertation presents low-cost solutions to both types of vulnerabilities.

In TimeCache, a cache designed to defend against reuse-based attacks, we disallow a cache hit on a cache line that has not been touched by an executing context, since the line was brought in. We preserve caching behaviour across process contexts without leaking timing information using a novel low-latency hardware design to compare access times. In RollingCache, a cache designed to defend against contention attacks, we dynamically change the set of addresses contending for cache sets. By using one level of indirection to implement dynamic mapping controlled by the whole-cache runtime behaviour, we avoid the need for additional computationally-expensive address encryption.

We extend the ideas from RollingCache and TimeCache to address timing side channels in TLBs and coherence directories. Our designs target commonly used disclosure primitives, thereby preventing a wide range of attacks that include those from the speculative domain.

Advisor: Prof. Sandhya Dwarkadas (Computer Science) Committee: Prof. Michael Scott (Computer Science), Prof. Yuhao Zhu (Computer Science), Prof. Michael Huang (Electrical and Computer Engineering), and Dr. Abhishek Basak (NVIDIA) Chair: Prof. Selcuk Kose (Electrical and Computer Engineering)