Accelerator Centric Computing

Introduction

Below is a set of notes that describe the main design choices for the ACC architecture, as discussed so far. There are more parameters and options which are not addressed here, and those which are, are not necessarily the result of consensus. Please contribute to this document by correcting/adding/removing at will, but maintain the structure. Don't worry about losing changes, the wiki maintains a history of this document.

--++ Accelerator tile

Contains

  1. Multiple accelerators. It is not yet clear if the accelerators would rather be of the same type or of different types. In favor of the first case, is the commonality of access patterns. In favor of the latter case, is the ability to chain multiple types of accelerators together in a shared (scratchpad) memory fashion.
  2. Scratchpad memory

Scratchpad Memory

  1. Physically, in close proximity to the accelerators
  2. Shared among the accelerators of a tile - not unique (physically) to every accelerator
  3. Limited in size, but enough to support at least the equivalent of two inputs for every accelerator (double buffering)
  4. Allocated by the system to the accelerators
  5. Populated through DMA from the resistive memory substrate

A unified address space across scratchpad memories and main system memory. The library writer who wants to use an accelerator, would have to do something like this in their C code:

scratchpad<double> A[1024];

to the system programmer, it will appear as if the lowest parts of their address space are

Scratchpad memory appears to be mapped at a range of addresses of the physical main memory. The idea is similar to the address mapping between

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Topic revision: r3 - 2010-03-02 - KonstantinosMenychtas
 
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