The ROFlow Chip


Features
  • optical flow estimation on 128 × 128 pixel frames
  • 40 MHz master clock corresponding to 1500 frames/sec

Technology
  • Alcatel Mietec 0.7 µm CMOS
  • digital standard cell library and compiled SRAM cells
  • 15 k gates (nand2), 1 kByte memory, 150 pad cells
  • 6.8 × 6.9 mm2 silicon area
  • MPW service through Europractice

<- The ROFlow-Sensor (TOP)
<- The Processing Unit

Thomas Röwekamp, GMD SET EIA , Last Update of this file: 10. December 1997