Computer Organization

Computer systems can be described at many levels involving both hardware and software. These levels constitute a hierarchy of virtual machines. Computer Organization is the study of this hierarchy: how to partition the hierarchy, how to specify the interface between layers, and how to design and implement each layer. In addition, this course will pay special attention to computer system architecture, the interface between ``hardware'' and ``software''. The basic topics covered will include: logical building blocks, computer arithmetic, instruction set design, processor organization, memory hierarchies, and I/O.


Sandhya Dwarkadas
e-mail: sandhya at cs
Office: CSB 717, 275-5647
Office hours by appointment, but don't be afraid to drop by. If you want to be sure I'm in my office, use e-mail to contact me.


Eduardo Pinheiro
e-mail: edpin at cs
Office: CSB 726, 275-5414
Office Hours: 11-12 on Tuesdays and Thursdays
Jonathan Tomer
email: jtomer at cs
Lab Hours: 11.30--1.30 on Mondays and Wednesdays in CSB 727

Questions and Answers

E-mail is best. Questions of general interest can be posted to the ur.cs252 newsgroup. Answers will be posted as soon as possible. Slides for the lectures will be accessible here. I will try to post any updates to the lecture notes online before class meets so that you can bring copies to class with you. However, I will not always be able to do so.


CSC 172 and MTH 220.

Required text:

Computer Organization & Design: The Hardware/Software Interface, Hennessy and Patterson, 2nd Edition, 1998.

Other texts:

Structured Computer Organization, Tanenbaum, 4th Edition, 1999. It has been updated and is well worth reading.
Computer Organization and Architecture, William Stallings, 5th Edition, 2000.

MIPS Reference:

MIPS RISC Architecture, Gerry Kane and Joe Heinrich, 1992.


There will be 7 or 8 homework assignments. The homework assignments will consist of both written and programming problems. Programming assignments will require assembly language and C/C++ coding (We will assume a basic familarity with C or C++ in many examples and problems. There will be tutorial sessions held by Ted Pawlicki during the beginning of the semester for those not familiar with C.). Some of the assignments will be accessible here. Please also read Eduardo's page on guidelines for the assignments.


Your final score will be determined as follows.

Assignments: 50%, Midterm: 16.67%, and Final Exam: 33.33%.

Honor Code Policy:

For homeworks and programming assignments, students are encouraged to consult each other, the labbies, the instructor, or anyone else for that matter. However, the assistance offered or accepted should not go beyond a discussion of the problem and a sketch of a solution. You can use the following guideline: when it comes time for you to write your program or your homework paper, do not use any written material from the discussion. If you can reconstruct the discussion and complete the solution on your own, then you have learned the material (and that is the objective of this course).

Late homework and absences from exams:

Late assignments will have 10% of your raw score deducted for each 24-hour period after the due date that the assignment is late. Examinations will be given at alternate times only with appropriately documented medical excuses.

Topics covered include:

Performance evaluation (Chapter 2): good and bad metrics

Instruction Set Architectures (ISAs - Chapter 3): framework for classifying and understanding ISAs, and case studies

Assembly Language Programming (Appendix A): representing high-level language data, user-level memory models, assemblers, linkers

Logic Design -- Brief Introduction (Appendix B): combinational logic, flip-flops, finite state machines (FSMs)

Arithmetic (Chapter 4): Fixed-point Representations for Integers, IEEE floating point, Arithmetic Logic Unit (ALU) design

Processor Implementation (Chapter 5): datapath and control,

Pipelining (Chapter 6): using parallelism to speed instruction execution

Memory Hierarchy -- The Principle of Locality of Reference (Chapter 7): instruction and data cache, virtual memory

I/O (Chapter 8): interrupts, buses, storage devices, communication and networking devices