IMPLEMENTATION OF CASHMERE

Michael L. Scott
Computer Science Department
University of Rochester
Workshop on Scalable Shared-Memory Multiprocessors
October 1996

Abstract

Outline


Cashmere People


Motivation

Hardware is faster, but software


The Price/Performance Curve

Q: How should coherence work given very low latency user-level messages?


Key Ideas in Cashmere


Works very well in simulation:


BUT:

This was simulation, on a network that doesn't match any current commercial hardware.

--> Implementation based on Digital's Memory Channel for PCI


The Good News

The Bad News


Cashmere MC Highlights

As in simulation, except:


How Should We Read Pages?

A protocol processor can also:


Current Priorities


Other Future Work



Link to main Cashmere project page

Last Change: 7 November 1996 / scott@cs.rochester.edu