Tutorial on SoC Modeling and Infrastructure

ISCA 2019

June 22nd, Phoenix, United States Registration


The main objective of our tutorial is to foster SoC-level computer architecture research whose major barrier of entry now is a lack of basic tools and infrastructures.

2:00 PM - 2:10 PM

Welcome and Introduction [slides]

Yuhao Zhu (University of Rochester)
2:10 PM - 2:55 PM

Introduction to SCALE-SIM: Systolic CNN AcceLErator Simulator [github][paper]

Ananda Samajdar (Georgia Tech)
2:55 PM - 3:30 PM

Designing AI IP Architecture [slides]

Xiaoyang Li (Synopsys Inc.)
3:30 PM - 4:00 PM

Coffee Break

4:00 PM - 4:15 PM

Designing AI SoC Architecture [slides]

Yu Zhang (Synopsys Inc.)
4:15 PM - 4:35 PM

Task-level modeling: A continuous vision case-study [slides]

Yiming Gan (University of Rochester)
4:35 PM - 4:55 PM

Case-study: Designing AI training chips [slides]

Weihang Zhang (Synopsys Inc.)


University of Rochester, Synopsys AI Lab and Georgia Tech are organizing this tutorial.


Yuhao Zhu

Assistant Professor, University of Rochester

Yuhao Zhu is an Assistant Professor in the Computer Science Department and an affiliated faculty in the Goergen Institute for Data Science at University of Rochester. He previously held research positions at ARM Research and Harvard University.

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Tushar Krishna

Assistant Professor, Georgia Tech

Tushar Krishna is an Assistant Professor in the School of Electrical and Computer Engineering at Georgia Tech, with an adjunct appointment in the School of Computer Science. He received a Ph.D. in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology in 2014. Prior to that, he received a M.S.E in Electrical Engineering from Princeton University in 2009, and a B.Tech in Electrical Engineering from the Indian Institute of Technology (IIT) Delhi in 2007.


Yiming Gan

PhD student, University of Rochester

Yiming Gan a first year Ph.D. student in the Department of Computer Science at the University of Rochester. He works with Prof. Yuhao Zhu. Currently he is working on designing faster and more energy efficient mobile System-on-a-chip (SoC) for existing artificial intelligence (AI) applications.


Ananda Samajdar

PhD student, Georgia Tech

Ananda Samajdar received a B.Tech. (Hons) in Electronics and Communication engineering from Indian Institute of Information Technology (IIIT), Allahabad in 2013. He also worked in the CHiPES lab at NTU, Singapore in the final semester of his undergrad.Following his bachelors, Ananda worked at Qualcomm India, Bangalore Design Center in the SoC integration and power teams as a front-end VLSI engineer for 3 years.He joined Georgia Tech as an ECE PhD student in 2016.His research focusses on computer architecture, with an emphasis on interconnect networks and accelerator design for machine learning workloads. He is also highly interested in deep learning algorithms and VLSI design.


Jeffery Liao

Director of AI Lab, Synopsys

Jeffery Liao currently serves as the Head of AI Laboratory in Synopsys. He has over 20 years of IC design industry experience in IP designs/SOC design/verification, software/hardware co-design and technical marketing in AI and other technologies. Jeffery Liao received his Bachelor degree in Computer Science from National TsingHua University and a Master degree in Electrical Engineering from National Taiwan University, respectively.