Publications
Journals
- Tapping into Parallelism with Transactional
Memory
A. Shriraman, S. Dwarkadas and M. L. Scott.
;login: The USENIX Magazine, Apr 2009
[Paper PDF]
Conferences
- Refereeing Conflicts in Hardware Transactional Memory.
A. Shriraman and S. Dwarkadas
23rd ACM International Conference on Supercomputing (ICS), June 2009.
[Paper PDF] [Talk PDF] [Talk Keynote.tar.gz] [TR PDF] [BibTex]
- Flexible Decoupled Transactional Memory Support.
A. Shriraman, S. Dwarkadas, and M. L. Scott.
35th International Symposium on Computer Architecture (ISCA), June 2008.
[Paper PDF] [Talk PDF] [Talk Keynote.tar.gz] [BibTex] [TR version]
- An Integrated Hardware-Software Approach to Flexible Transactional
Memory.
A. Shriraman, M. F. Spear, H. Hossain, V. Marathe, S. Dwarkadas, and M. L. Scott.
34th International Symposium on Computer Architecture (ISCA), June 2007.
[Paper PDF] [Talk PPT] [BibTex]
- Nonblocking Transactions Without Indirection Using Alert-on-Update.
M. F. Spear, A. Shriraman, L. Dalessandro, S. Dwarkadas, and M. L. Scott.
19th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), June 2007.
[Paper PDF] [Talk PPT] [BibTex]
- PASCOM: Power Model for Supercomputers
A. Shriraman, N. Venkateswaran, and S. Niranjan.
19th International Conference on Architecture of Computing Systems (ARCS), March 2006. Accepted 32/174 papers.
Newsletters and Refereed Workshops
- Transactional Mutex Locks
M.F. Spear, A. Shriraman, L. Dalessandro and M. L. Scott.
Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (TRANSACT) held with PPOPP, Feb 2009.
- Hardware Acceleration of Software Transactional
Memory
A. Shriraman, V. Marathe, S. Dwarkadas, M. L. Scott, D. Eisenstat, C. Heriot, W. N. Scherer III, and M. F. Spear.
Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (TRANSACT) held with PLDI, June 2006.
- Memory In Processor SuperComputer On a Chip -
Processor Design and Execution Semantics for Massive On-Chip
Parallelism
N. Venkateswaran, A. Shriraman, S. Niranjan.
Workshop on Massively Parallel Processing (WMPP) held with IPDPS, April 8 2005
- Memory In Processor: A Novel Design Paradigm for
Supercomputing Architectures.
N. Venkateswaran, A. Krishnan, A. Shriraman, S. Niranjan, S. Srinivas.
ACM SIGARCH Computer Architecture News (ACM CAN), Volume 32, Issue 3, June 2004
- The MIP Project: Evolution of a Novel Supercomputer
Architecture.
N. Venkateswaran, A. Shriraman, A. Krishnan, S. Niranjan, and S. Srinivas.
Workshop on MEmory performance: DEaling with Applications Systems & Architecture (MEDEA), held with PACT, September 2003.
Short Papers and Refereed Posters
- DIMM: Architecture Support for Data Isolation and Memory
Monitoring.
A. Shriraman, S. Dwarkadas and M. L. Scott
13th Intl. Symp. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2008.
[Poster PDF]
- Alert-on-Update: A Communication Aid for Shared Memory
Multiprocessors.
M. F. Spear, A. Shriraman, H. Hossain, S. Dwarkadas, and M. L. Scott.
11th ACM Symposium on Principles and Practice of Parallel Programming (PPOPP), March 2007.
