Publication List
Scalable Synchronization
2013
-
Shared Memory Synchronization, by M. L. Scott.
Morgan & Claypool Publishers, 2013.
-
“TARDIS:
Task-level Access Race Detection by Intersecting Sets,”
by W. Ji, L. Lu, and M. L. Scott.
4th Workshop on Determinism
and Correctness in Parallel Programming (WoDet),
Houston, TX, Mar. 2013 (in conjunction with ASPLOS XVIII).
-
“Compiler Aided
Manual Speculation for High Performance Concurrent Data
Structures,”
by L. Xiang and M. L. Scott.
18th ACM Symposium on Principles
and Practice of Parallel Programming (PPoPP), Shenzhen, China,
Feb. 2013.
2012
-
“Sandboxing
Transactional Memory,”
by L. Dalessandro and M. L. Scott.
21st Intl. Conf. on
Parallel Architectures and Compilation Techniques (PACT),
Minneapolis, MN, Sep. 2012.
Earlier version
presented at the 7th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), New Orleans, LA, Feb. 2012.
-
“MSpec: A Design
Pattern for Concurrent Data Structures,”
by L. Xiang and M. L. Scott.
7th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), New Orleans, LA, Feb. 2012.
-
“Unmanaged
Multiversion STM,”
by L. Li and M. L. Scott.
7th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), New Orleans, LA, Feb. 2012.
2011
-
“Toward a Formal Semantic
Framework for Deterministic Parallel
Programming,” by M. L. Scott and L. Lu.
25th Intl. Symp. on
Distributed Computing (DISC), Rome, Italy, Sep. 2011.
Earlier version presented at the
2nd Wkshp. on
Determinism and Correctness in Parallel Programming (WoDet), Newport
Beach, CA, Mar. 2011 (in conjunction with
ASPLOS XVI).
-
“Interchangeable Back
Ends for STM Compilers,” by G. Kestor, L. Dalessandro,
A. Cristal, M. L. Scott, and O. Unsal.
6th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), San Jose, CA, June. 2011.
-
“Synchronization,”
by M. L. Scott. in Encyclopedia of Parallel Computing,
D. Padua, editor. Springer Science+Business Media, 2011.
-
“Hybrid
NOrec: A Case Study in the Effectiveness of Best Effort
Hardware Transactional Memory,” by L. Dalessandro,
F. Carouge, S. White, Y. Lev, M. Moir,
M. L. Scott, and M. F. Spear.
16th Intl. Conf. on
Architectural Support for Programming Languages and Operating Systems
(ASPLOS), Newport Beach, CA, Mar. 2011.
2010
-
“Implementation
Tradeoffs in the Design of Flexible Transactional Memory Support,”
by A. Shriraman, S. Dwarkadas, and M. L. Scott.
J. of Parallel and Distributed Computing, Oct. 2010.
- “On the Orthogonality of
Speculation and Atomicity,” by L. Dalessandro and
M. L. Scott. 2nd
Wkshp. on the Theory of Transactional Memory (WTTM), Cambridge, MA,
Sep. 2010. In conjunction with DISC 2010.
- “Transactions
as the Foundation of a Memory Consistency Model,”
by L. Dalessandro, M. L. Scott, and M. F. Spear.
24th Intl. Symp. on
Distributed Computing (DISC), Cambridge, MA, Sep. 2010.
Expanded version published as
TR 959,
Computer Science Dept., Univ. of Rochester, July 2010.
- “Transactional
Mutex Locks,”
by L. Dalessandro, Dave Dice, M. L. Scott, Nir Shavit, and
M. F. Spear.
Euro-Par 2010,
Ischia-Naples, Italy, Aug.–Sep. 2010.
Earlier version, by
M. F. Spear, A. Shriraman, L. Dalessandro, and
M. L. Scott, presented at the
4th ACM SIGPLAN Wkshp.
on Transactional Computing (TRANSACT), Raleigh, NC, Feb. 2009.
-
“Hybrid
TM Using NOrec STM,” by L. Dalessandro, M. F. Spear,
and M. L. Scott.
Poster presentation,
15th
Intl. Conf. on Architectural Support for Programming Languages and
Operating Systems (ASPLOS), Pittsburgh, PA, Mar. 2010.
-
“NOrec: Streamlining
STM by Abolishing Ownership Records,” by
L. Dalessandro, M. F. Spear, and M. L. Scott.
15th ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP),
Bangalore, India, Jan. 2010.
2009
-
“Making the Simple
Case Simple,” by M. L. Scott. Position paper,
Wkshp.
on Curricula for Concurrency, Orlando, FL, Oct. 2009.
In conjunction with
OOPSLA 2009.
-
“Fastpath
Speculative Parallelization,” by
M. F. Spear, K. Kelsey, T. Bai, L. Dalessandro,
M. L. Scott, C. Ding, and P. Wu.
22nd Intl. Wkshp. on
Languages and Compilers for Parallel Computing (LCPC), Newark, DE,
Oct. 2009.
-
“Scalable
Synchronous Queues,” by
W. N. Scherer III, D. Lea, and M. L. Scott.
Communications of the ACM,
May 2009.
Earlier version
published in the
11th ACM Symp. on Principles and
Practice of Parallel Programming (PPoPP), New York, NY,
Mar. 2006. Winner, Best Student Paper award.
- “Tapping into
Parallelism with Transactional Memory,”
by A. Shriraman, S. Dwarkadas, and M. L. Scott.
;login: (the
USENIX Magazine), Apr. 2009.
- “Reducing Memory
Ordering Overheads in Software Transactional Memory,”
by M. F. Spear, M. M. Michael, M. L. Scott, and
P. Wu.
2009 Intl. Symp. on Code
Generation and Optimization (CGO), Seattle, WA, Mar. 2009.
- “A Comprehensive
Contention Management Strategy for Software Transactional Memory,”
by M. F. Spear, L. Dalessandro, V. J. Marathe, and
M. L. Scott.
14th ACM Symp. on Principles and
Practice of Parallel Programming (PPoPP), Raleigh, NC, Feb. 2009.
- “Strong Isolation
is a Weak Idea,”
by L. Dalessandro and M. L. Scott.
4th ACM SIGPLAN Wkshp.
on Transactional Computing (TRANSACT), Raleigh, NC, Feb. 2009.
2008
- “Ordering-Based
Semantics for Software Transactional Memory,”
by M. F. Spear, L. Dalessandro, V. J. Marathe, and
M. L. Scott.
12th Intl. Conf. on Principles of
Distributed Systems (OPODIS), Luxor, Egypt, Dec. 2008.
Earlier version published as
TR 938,
Computer Science Dept., Univ. of Rochester, Aug. 2008.
- “Scalable Techniques
for Transparent Privatization in Software Transactional Memory,”
by V. J. Marathe, M. F. Spear, and M. L. Scott.
2008
Intl. Conf. on Parallel Processing (ICPP),
Portland, OR, Sep. 2008.
- “Implementing and
Exploiting Inevitability in Software Transactional Memory,”
by M. F. Spear, M. Silverman, L. Dalessandro,
M. M. Michael, and M. L. Scott.
2008
Intl. Conf. on Parallel Processing (ICPP),
Portland, OR, Sep. 2008.
- “Transactional
Memory Retry Mechanisms,”
by M. F. Spear, A. Sveikauskas, and M. L. Scott.
Brief announcement, 27th ACM
Symp. on Principles of Distributed Computing (PODC), Toronto,
ON, Canada, Aug. 2008.
Expanded version published as
TR 935, Computer
Science Dept., Univ. of Rochester, Nov. 2007.
- “Flexible
Decoupled Transactional Memory Support,”
by A. Shriraman,
S. Dwarkadas, and M. L. Scott.
35th Intl. Symp. on
Computer Architecture (ISCA), Beijing, China, June 2008.
Earlier but expanded version published as
TR 925, Computer
Science Dept., Univ. of Rochester, Nov. 2007.
- “DIMM:
Architecture Support for Data Isolation and Memory Monitoring,”
by A. Shriraman, S. Dwarkadas, and M. L. Scott.
Poster presentation,
13th Intl. Conf. on
Architectural Support for Programming Languages and Operating
Systems (ASPLOS), Seattle, WA, Apr. 2008.
- “RingSTM:
Scalable Transactions with a Single Atomic Instruction,”
by M. F. Spear, M. M. Michael, and C. von Praun.
20th ACM Symposium on
Parallelism in Algorithms and Architectures, Munich, Germany,
June 2008.
Earlier but expanded version published as
Research Report RC24499, IBM T. J. Watson Research Center,
Feb. 2008.
- “Inevitability
Mechanisms for Software Transactional Memory,”
by M. F. Spear, M. M. Michael, and M. L. Scott.
3rd ACM SIGPLAN Wkshp. on
Transactional Computing (TRANSACT), Salt Lake City, UT,
Feb. 2008.
2007
-
“Toward High Performance
Nonblocking Software Transactional Memory,”
by V. J. Marathe and Mark Moir.
13th ACM SIGPLAN Symposium
on Principles and Practice of Parallel Programming (PPoPP),
Salt Lake City, Utah, Feb. 2008.
Extended version published as
“Efficient Nonblocking Software Transactional Memory,”
TR 932, Computer Science Dept., Univ. of Rochester, Mar. 2008.
-
“Transaction Safe
Nonblocking Data Structures”
(brief announcement), by V. J. Marathe, M. F. Spear, and
M. L. Scott.
21st Intl. Symp. on
Distributed Computing (DISC), Lemesos, Cyprus, Sep. 2007.
Full version published as
TR 924, Computer
Science Dept., Univ. of Rochester, Sep. 2007.
-
“Delaunay
Triangulation with Transactions and Barriers,”
by M. L. Scott, M. F. Spear, L. Dalessandro, and
V. J. Marathe.
Benchmarks track,
IEEE
Intl. Symp. on Workload Characterization (IISWC),
Boston, MA, Sep. 2007.
-
“Capabilities
and Limitations of Library-Based Software Transactional
Memory in C++,”
by L. Dalessandro, V. J. Marathe, M. F. Spear, and
M. L. Scott.
2nd ACM
SIGPLAN Wkshp. on Transactional Computing (TRANSACT),
Portland, OR, Aug. 2007.
-
“Privatization
Techniques for Software Transactional Memory”
(brief announcement),
by M. F. Spear, V. J. Marathe, L. Dalessandro, and
M. L. Scott.
26th ACM Symp. on
Principles of Distributed Computing (PODC), Portland, OR,
Aug. 2007.
Extended version published as
TR 915, Computer
Science Dept., Univ. of Rochester, Feb. 2007.
-
“Transactions and
Privatization in Delaunay Triangulation”
(brief announcement),
by M. L. Scott, M. F. Spear, L. Dalessandro, and
V. J. Marathe.
26th ACM Symp. on
Principles of Distributed Computing (PODC), Portland, OR, Aug. 2007.
-
“An Integrated
Hardware-Software Approach to Flexible Transactional Memory,”
by A. Shriraman, M. F. Spear, H. Hossain,
V. J. Marathe, S. Dwarkadas, and M. L. Scott.
34th Intl. Symp. on
Computer Architecture (ISCA), San Diego,
CA, June 2007.
Earlier but expanded version published as
TR 910, Computer
Science Dept., Univ. of Rochester, Dec. 2006.
-
“Nonblocking
Transactions Without Indirection Using Alert-on-Update,”
by M. F. Spear, A. Shriraman, L. Dalessandro,
S. Dwarkadas, and M. L. Scott.
19th ACM Symp. on
Parallelism in Algorithms and Architectures (SPAA), San Diego,
CA, June 2007.
-
“Alert-on-Update:
A Communication Aid for Shared Memory Multiprocessors,”
by M. F. Spear, A. Shriraman, H. Hossain, S. Dwarkadas,
and M. L. Scott.
Poster presentation,
12th ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP), San Jose,
CA, Mar. 2007.
-
“An Efficient
Nonblocking Copyback Mechanism in Hybrid
Transactional Memory,” by
V. Marathe and M. Moir.
Poster presentation,
12th ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP), San Jose,
CA, Mar. 2007.
-
“Featherweight
Transactions: Decoupling Threads and Atomic
Blocks,” by
V. Marathe, T. Harris, and J. Larus.
Poster presentation,
12th ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP), San Jose,
CA, Mar. 2007.
-
“A Key-Based Adaptive
Transactional Memory Executor,”
by T. Bai, X. Shen, C. Zhang, W. N. Scherer III,
C. Ding, and M. L. Scott.
NSF
Next Generation Software Program Wkshp., Long Beach, CA,
Mar. 2007.
In conjunction with
IPDPS 2007.
Expanded version published as
TR 909,
Computer Science Dept., Univ. of Rochester, Dec. 2006.
2006
-
“Conflict
Detection and Validation Strategies for Software
Transactional Memory,”
by M. F. Spear, V. J. Marathe, W. N. Scherer III,
and M. L. Scott.
20th Intl. Symp. on
Distributed Computing (DISC), Stockholm, Sweden, Sep. 2006.
Also on-line:
presentation slides.
-
“Lowering the
Overhead of Nonblocking Software Transactional Memory,”
by V. J. Marathe, M. F. Spear, C. Heriot,
A. Acharya, D. Eisenstat, W. N. Scherer III,
and M. L. Scott.
Wkshp. on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI 2006.
Earlier, extended version published as
TR 893,
Computer Science Dept., Univ. of Rochester,
Mar. 2006.
-
“Hardware
Acceleration of Software Transactional Memory,”
by A. Shriraman, V. J. Marathe, S. Dwarkadas,
M. L. Scott, D. Eisenstat, C. Heriot,
W. N. Scherer III, and M. F. Spear.
Wkshp. on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI 2006.
Earlier, extended version published as
TR 887,
Computer Science Dept., Univ. of Rochester, Dec.
2005, revised Mar. 2006.
-
“Sequential
Specification of Transactional Memory Semantics,”
by M. L. Scott.
Wkshp. on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI 2006.
-
“Composite Abortable Locks,”
by V. J. Marathe, M. Moir, and N. Shavit.
20th Intl. Parallel and
Distributed Processing Symp. (IPDPS), Apr. 2006.
2005
-
“A Lazy Concurrent List-Based Set Algorithm,” by
S. Heller, M. Herlihy, V. Luchangco, M. Moir, N. Shavit, and W. N
Scherer III.
9th
Intl. Conf. on Principles of Distributed Systems (OPODIS),
Dec. 2005.
-
“Preemption
Adaptivity in Time-Published Queue-Based Spin Locks,” by
B. He, W. N. Scherer III, and M. L. Scott.
12th Intl. Conf. on High Performance
Computing, Goa, India, Dec. 2005.
Winner, Best Paper award.
Earlier version published as
TR 867,
Computer Science Dept., Univ. of Rochester, May 2005.
-
“A Scalable
Elimination-based Exchange Channel,” by
W. N. Scherer III, D. Lea, and M. L. Scott.
Wkshp.
on Synchronization and Concurrency in Object-Oriented Languages
(SCOOL), San Diego, CA, Oct. 2005.
In conjunction with OOPSLA 2005.
-
“Transaction Synchronizers,” by
V. Luchangco and V. J. Marathe.
Wkshp.
on Synchronization and Concurrency in Object-Oriented Languages
(SCOOL), Oct. 2005.
In conjunction with OOPSLA’05.
-
“Adaptive Software
Transactional Memory,” by V. J. Marathe,
W. N. Scherer III, and M. L. Scott.
19th Intl. Symp. on
Distributed Computing (DISC), Cracow, Poland, Sep. 2005.
Earlier version published as
TR 868,
Computer Science Dept., Univ. of Rochester, May 2005.
-
“Advanced Contention
Management for Dynamic Software Transactional
Memory,” by W. N. Scherer III and M. L. Scott.
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005.
-
“Using
LL/SC to Simplify Word-based Software Transactional Memory,”
by V. J. Marathe and M. L. Scott.
Poster presentation,
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005.
-
“Randomization
in STM Contention Management,”
by W. N. Scherer III and M. L. Scott.
Poster presentation,
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005. Winner, Most Popular Poster Presentation award.
2004
-
“Design Tradeoffs in Modern
Software Transactional Memory Systems,” by
V. J. Marathe, W. N. Scherer III, and M. L. Scott.
7th Wkshp. on Languages, Compilers, and Run-time Support
for Scalable Systems (LCR), Houston, TX, Oct. 2004.
-
“Nonblocking Concurrent
Data Structures with Condition Synchronization,” by
W. N. Scherer III and M. L. Scott.
18th Annual Conf. on
Distributed Computing (DISC), Amsterdam, The Netherlands,
Oct. 2004.
-
“Contention
Management in Dynamic Software Transactional Memory,” by
W. N. Scherer III and M. L. Scott.
PODC Wkshp. on
Concurrency and Synchronization in Java Programs (CSJP),
St. John’s, NL, Canada, July 2004. In conjunction with the
23rd
ACM Symp. on Principles of Distributed Computing (PODC).
Please also download the
ERRATA.
-
“A Qualitative Survey of Modern
Software Transactional Memory Systems,”
by V. J. Marathe and M. L. Scott. TR 839, Computer Science
Dept., Univ. of Rochester, June 2004.
2003
-
“Software
Transactional Memory for Dynamic-Sized Data Structures,” by
M. Herlihy, V. Luchangco, M. Moir, and
W. N. Scherer III.
22nd ACM Symp. on Principles
of Distributed Computing (PODC), July 2003.
-
“Quickly
Reacquirable Locks,” by D. Dice, M. Moir, and
W. N. Scherer III.
Technical Report, Sun Microsystems Labs, 2003.
2002
2001
1998
1997
-
“Relative
Performance of Preemption-Safe Locking and Non-Blocking
Synchronization on Multiprogrammed Shared Memory
Multiprocessors,”
by M. M. Michael and M. L. Scott.
Proc. of the 11th Intl. Parallel
Processing Symp. (IPPS), Geneva, Switzerland, Apr. 1997.
Earlier version published as
“Concurrent Update on
Multiprogrammed Shared Memory Multiprocessors,”
TR 614, Computer Science Dept., Univ. of Rochester, Apr. 1996.
-
“Scheduler-Conscious
Synchronization,”
by L. I. Kontothanassis, R. W. Wisniewski, and M. L. Scott.
ACM Trans. on Computer Systems,
Feb. 1997.
Earlier version published as TR 550, Computer
Science Dept., Univ. of Rochester, Dec. 1994.
1996
-
“An Efficient Algorithm for
Concurrent Priority Queue Heaps”
by G. C. Hunt, M. M. Michael, S. Parthasarathy, and
M. L. Scott.
Information Processing Letters, Nov. 1996.
Earlier version published as TR 560, Computer Science
Dept., Univ. of Rochester, Dec. 1994.
-
“Simple, Fast, and
Practical Non-Blocking and Blocking Concurrent Queue Algorithms,”
by M. M. Michael and M. L. Scott.
15th ACM Symp. on Principles of
Distributed Computing (PODC), Philadelphia, PA, May 1996.
Earlier version published as TR 600, Computer Science Dept.,
Univ. of Rochester, Dec. 1995.
-
“The Topological Barrier: A
Synchronization Abstraction for Regularly-Structured Parallel
Applications,”
by M. L. Scott and M. M. Michael.
TR 605, Computer Science Dept., Univ.
of Rochester, Jan. 1996.
1995
-
“Correction of a Memory
Management Method for Lock-Free Data Structures,”
by M. M. Michael and M. L. Scott.
TR 599, Computer Science Dept., Univ. of Rochester, Dec. 1995.
-
“High Performance
Synchronization Algorithms for Multiprogrammed Multiprocessors,”
by R. W. Wisniewski, L. I. Kontothanassis, and M. L. Scott.
5th ACM Symp. on Principles and Practice
of Parallel Programming (PPoPP), July 1995.
-
“Implementation
of Atomic Primitives on Distributed Shared-Memory
Multiprocessors,”
by M. M. Michael and M. L. Scott.
1st Intl. Symp. on High Performance Computer Architecture (HPCA),
Raleigh, NC, Jan. 1995.
Earlier version published as Scalability of Atomic Primitives
on Distributed Shared Memory Multiprocessors,” TR 528, Computer
Science Dept., Univ. of Rochester, July 1994.
1994
-
“Fast,
Contention-Free Combining Tree Barriers for Shared-Memory
Multiprocessors,”
by M. L. Scott and J. M. Mellor-Crummey.
Intl. J. of Parallel Programming, Aug. 1994.
Previous version published as TR 429, Computer Science Dept., Univ. of Rochester, June 1992.
-
“Scalable Spin Locks for
Multiprogrammed Systems,”
by R. W. Wisniewski, L. I. Kontothanassis, and M. L. Scott.
8th Intl. Parallel Processing Symp., Cancun, Mexico, Apr. 1994.
Also TR 454, Computer
Science Dept., Univ. of Rochester, Apr. 1993.
1993
-
“Fast Mutual Exclusion, Even
with Contention,”
by M. M. Michael and M. L. Scott.
TR 460, Computer Science Dept., Univ. of Rochester, June 1993.
-
“Using Scheduler Information
to Achieve Optimal Barrier Synchronization Performance,”
by L. I. Kontothanassis and R. W. Wisniewski.
4th ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), May 1993.
-
“Kernel-Kernel
Communication in a Shared-Memory Multiprocessor,”
by E. M. Chaves, P. Ch. Das, T. J. LeBlanc,
B. D. Marsh, and M. L. Scott.
Concurrency—Practice and Experience, May 1993.
Also TR 368, Computer
Science Dept., Univ. of Rochester, Apr. 1991.
Earlier version
presented at the 2nd Symp. on Experiences with Distributed and
Multiprocessor Systems (SEDMS), Atlanta, GA, Mar. 1991.
1991
-
“First-Class
User-Level Threads,”
by B. D. Marsh, M. L. Scott, T. J. LeBlanc, and
E. P. Markatos.
ACM Symp. on Operating Systems Principles (SOSP), Pacific Grove,
CA, Oct. 1991.
-
“Scalable
Reader-Writer Synchronization for Shared-Memory
Multiprocessors,”
by J. M. Mellor-Crummey and M. L. Scott.
3rd ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), Williamsburg, VA, Apr. 1991.
-
“Synchronization Without
Contention,”
by J. M. Mellor-Crummey and M. L. Scott.
4th Intl. Conf. on Architectural Support for Programming Languages
and Operating Systems (ASPLOS), Santa Clara, CA, Apr. 1991.
-
“Algorithms for
Scalable Synchronization on Shared-Memory Multiprocessors,”
by J. M. Mellor-Crummey and M. L. Scott.
ACM Trans. on Computer Systems,
Feb. 1991.
Winner, 2006 Edsger
W. Dijkstra Prize in Distributed Computing.
Earlier version published as
TR 342, Computer Science
Dept., Univ. of Rochester, and
COMP TR 90–114, Center for Research on Parallel Computation,
Rice Univ., Apr. 1990.
Patents
-
“Flexible Decoupled Transactional Memory Support,” by
A.~Shriraman, S.~Dwarkadas, and M.~L. Scott.
Provisional US patent application filed 17 Aug. 2007;
full application submitted 15 Aug. 2008;
revised claims submitted 31 Oct. 2011.
-
“System and Method for Hardware Acceleration of a Software
Transactional Memory,” by
M. L. Scott, S. Dwarkadas, A. Shriraman, and
V. Marathe.
Submitted 10 Dec. 2006; revised claims submitted 26 Oct. 2010; awarded
15 May 2012.
-
“Scalable Queue-Based Spin Locks with Timeout,” by
M. L. Scott.
Submitted 3 Mar. 2003; awarded 15 Sep. 2005.
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