Publication List
Scalable Synchronization
-
“Making the Simple
Case Simple,” by by M. L. Scott. Position paper,
Workshop
on Curricula for Concurrency, Orlando, FL, Oct. 2009.
In conjunction with
OOPSLA'09.
-
“NOrec: Streamlining
STM by Abolishing Ownership Records,” by
L. Dalessandro, M. F. Spear, and M. L. Scott.
15th ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP),
Bangalore, India, Jan. 2010.
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“Fastpath
Speculative Parallelization,” by
M. F. Spear, K. Kelsey, T. Bai, L. Dalessandro,
M. L. Scott, C. Ding, and P. Wu.
22nd Intl. Workshop on
Languages and Compilers for Parallel Computing (LCPC), Newark, DE,
Oct. 2009.
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“Scalable
Synchronous Queues,” by
W. N. Scherer III, D. Lea, and M. L. Scott.
Communications of the ACM,
May 2009.
Earlier version
published in the
11th ACM Symp. on Principles and
Practice of Parallel Programming (PPoPP), New York, NY,
Mar. 2006. Winner, Best Student Paper award.
- “Tapping into
Parallelism with Transactional Memory,”
by A. Shriraman, S. Dwarkadas, and M. L. Scott.
;login: (the
USENIX Magazine), Apr. 2009.
- “Transactional
Mutex Locks,”
by M. F. Spear, A. Shriraman, L. Dalessandro, and
M. L. Scott.
4th ACM SIGPLAN Workshop
on Transactional Computing (TRANSACT), Raleigh, NC, Feb. 2009.
- “Strong Isolation
is a Weak Idea,”
by L. Dalessandro and M. L. Scott.
4th ACM SIGPLAN Workshop
on Transactional Computing (TRANSACT), Raleigh, NC, Feb. 2009.
- “Reducing Memory
Ordering Overheads in Software Transactional Memory,”
by M. F. Spear, M. M. Michael, M. L. Scott, and
P. Wu.
2009 Intl. Symp. on Code
Generation and Optimization (CGO), Seattle, WA, Mar. 2009.
- “A Comprehensive
Contention Management Strategy for Software Transactional Memory,”
by M. F. Spear, L. Dalessandro, V. J. Marathe, and
M. L. Scott.
14th ACM Symp. on Principles and
Practice of Parallel Programming (PPoPP), Raleigh, NC, Feb. 2009.
- “Ordering-Based
Semantics for Software Transactional Memory,”
by M. F. Spear, L. Dalessandro, V. J. Marathe, and
M. L. Scott.
12th Intl. Conf. on Principles of
Distributed Systems (OPODIS), Luxor, Egypt, Dec. 2008.
Earlier version available as
TR 938,
Computer Science Dept., Univ. of Rochester, Aug. 2008.
- “Transactional
Memory Retry Mechanisms,”
by M. F. Spear, A. Sveikauskas, and M. L. Scott.
Brief announcement, 27th ACM
Symp. on Principles of Distributed Computing (PODC), Toronto,
ON, Canada, Aug. 2008.
Expanded version available as
TR 925, Computer
Science Dept., Univ. of Rochester, Nov. 2007.
- “Scalable Techniques
for Transparent Privatization in Software Transactional Memory,”
by V. J. Marathe, M. F. Spear, and M. L. Scott.
2008
Intl. Conf. on Parallel Processing (ICPP),
Portland, OR, Sept. 2008.
- “Implementing and
Exploiting Inevitability in Software Transactional Memory,”
by M. F. Spear, M. Silverman, L. Dalessandro,
M. M. Michael, and M. L. Scott.
2008
Intl. Conf. on Parallel Processing (ICPP),
Portland, OR, Sept. 2008.
- “Flexible
Decoupled Transactional Memory Support,”
by A. Shriraman,
S. Dwarkadas, and M. L. Scott.
35th Intl. Symp. on
Computer Architecture (ISCA), Beijing, China, June 2008.
Earlier but expanded version available as
TR 925, Computer
Science Dept., Univ. of Rochester, Nov. 2007.
- “DIMM:
Architecture Support for Data Isolation and Memory Monitoring”
(poster paper),
by A. Shriraman, S. Dwarkadas, and M. L. Scott.
13th Intl. Conf. on
Architectural Support for Programming Languages and Operating
Systems (ASPLOS), Seattle, WA, Apr. 2008.
- “RingSTM:
Scalable Transactions with a Single Atomic Instruction,”
by M. F. Spear, M. M. Michael, and C. von Praun.
20th ACM Symposium on
Parallelism in Algorithms and Architectures, Munich, Germany,
June 2008.
Earlier but expanded version available as
Research Report RC24499, IBM T. J. Watson Research Center,
Feb. 2008.
- “Inevitability
Mechanisms for Software Transactional Memory,”
by M. F. Spear, M. M. Michael, and M. L. Scott.
3rd ACM SIGPLAN Workshop on
Transactional Computing (TRANSACT), Salt Lake City, UT,
Feb. 2008.
-
“Toward High Performance
Nonblocking Software Transactional Memory,”
by V. J. Marathe and Mark Moir.
13th ACM SIGPLAN Symposium
on Principles and Practice of Parallel Programming (PPoPP),
Salt Lake City, Utah, Feb. 2008.
Extended version available as
“Efficient Nonblocking Software Transactional Memory,”
TR 932, Computer Science Dept., Univ. of Rochester, Mar. 2008.
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“Transaction Safe
Nonblocking Data Structures”
(brief announcement), by V. J. Marathe, M. F. Spear, and
M. L. Scott.
21st Intl. Symp. on
Distributed Computing (DISC), Lemesos, Cyprus, Sept. 2007.
Full version available as
TR 924, Computer
Science Dept., Univ. of Rochester, Sept. 2007.
-
“Delaunay
Triangulation with Transactions and Barriers,”
by M. L. Scott, M. F. Spear, L. Dalessandro, and
V. J. Marathe.
Benchmarks track,
IEEE
Intl. Symp. on Workload Characterization (IISWC),
Boston, MA, Sept. 2007.
-
“Capabilities
and Limitations of Library-Based Software Transactional
Memory in C++,”
by L. Dalessandro, V. J. Marathe, M. F. Spear, and
M. L. Scott.
2nd ACM
SIGPLAN Workshop on Transactional Computing (TRANSACT),
Portland, OR, Aug. 2007.
-
“Privatization
Techniques for Software Transactional Memory”
(brief announcement),
by M. F. Spear, V. J. Marathe, L. Dalessandro, and
M. L. Scott.
26th ACM Symp. on
Principles of Distributed Computing (PODC), Portland, OR, Aug. 2007.
Extended version available as
TR 915, Computer
Science Dept., Univ. of Rochester, Feb. 2007.
-
“Transactions and
Privatization in Delaunay Triangulation”
(brief announcement),
by M. L. Scott, M. F. Spear, L. Dalessandro, and
V. J. Marathe.
26th ACM Symp. on
Principles of Distributed Computing (PODC), Portland, OR, Aug. 2007.
-
“An Integrated
Hardware-Software Approach to Flexible Transactional Memory,”
by A. Shriraman, M. F. Spear, H. Hossain,
V. J. Marathe, S. Dwarkadas, and M. L. Scott.
34th Intl. Symp. on
Computer Architecture (ISCA), San Diego,
CA, June 2007.
Earlier but expanded version available as
TR 910, Computer
Science Dept., Univ. of Rochester, Dec. 2006.
-
“Nonblocking
Transactions Without Indirection Using Alert-on-Update,”
by M. F. Spear, A. Shriraman, L. Dalessandro,
S. Dwarkadas, and M. L. Scott.
19th ACM Symp. on
Parallelism in Algorithms and Architectures (SPAA), San Diego,
CA, June 2007.
-
“Alert-on-Update:
A Communication Aid for Shared Memory Multiprocessors”
(poster paper),
by M. F. Spear, A. Shriraman, H. Hossain, S. Dwarkadas,
and M. L. Scott.
Twelfth ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP), San Jose,
CA, Mar. 2007.
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“A Key-Based Adaptive
Transactional Memory Executor,”
by T. Bai, X. Shen, C. Zhang, W. N. Scherer III,
C. Ding, and M. L. Scott.
NSF
Next Generation Software Program Workshop, Long Beach, CA,
Mar. 2007.
In conjunction with
IPDPS’07.
Expanded version available as
TR 909,
Computer Science Dept., Univ. of Rochester, Dec. 2006.
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“Conflict
Detection and Validation Strategies for Software
Transactional Memory,”
by M. F. Spear, V. J. Marathe, W. N. Scherer III,
and M. L. Scott.
20th Intl. Symp. on
Distributed Computing (DISC), Stockholm, Sweden, Sept. 2006.
Also on-line:
presentation slides.
-
“Lowering the
Overhead of Nonblocking Software Transactional Memory,”
by V. J. Marathe, M. F. Spear, C. Heriot,
A. Acharya, D. Eisenstat, W. N. Scherer III,
and M. L. Scott.
Workshop on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI’06.
Earlier, extended version available as
TR 893,
Computer Science Dept., Univ. of Rochester,
Mar. 2006.
-
“Hardware
Acceleration of Software Transactional Memory,”
by A. Shriraman, V. J. Marathe, S. Dwarkadas,
M. L. Scott, D. Eisenstat, C. Heriot,
W. N. Scherer III, and M. F. Spear.
Workshop on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI’06.
Earlier, extended version available as
TR 887,
Computer Science Dept., Univ. of Rochester, Dec.
2005, revised Mar. 2006.
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“Sequential
Specification of Transactional Memory Semantics,”
by M. L. Scott.
Workshop on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI’06.
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“Composite Abortable Locks,”
by V. J. Marathe, M. Moir, and N. Shavit.
20th Intl. Parallel and
Distributed Processing Symp. (IPDPS), Apr. 2006.
-
“A Lazy Concurrent List-Based Set Algorithm,” by
S. Heller, M. Herlihy, V. Luchangco, M. Moir, N. Shavit, and W. N
Scherer III.
9th
Intl. Conf. on Principles of Distributed Systems (OPODIS),
Dec. 2005.
-
“Preemption
Adaptivity in Time-Published Queue-Based Spin Locks,” by
B. He, W. N. Scherer III, and M. L. Scott.
11th Intl. Conf. on High Performance Computing,
Dec. 2005.
Winner, Best Paper award.
Earlier version available as
TR 867,
Computer Science Dept., Univ. of Rochester, May 2005.
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“A Scalable
Elimination-based Exchange Channel,” by
W. N. Scherer III, D. Lea, and M. L. Scott.
Workshop
on Synchronization and Concurrency in Object-Oriented Languages
(SCOOL), San Diego, CA, Oct. 2005.
In conjunction with OOPSLA’05.
-
“Transaction Synchronizers,” by
V. Luchangco and V. J. Marathe.
Workshop
on Synchronization and Concurrency in Object-Oriented Languages
(SCOOL), Oct. 2005.
In conjunction with OOPSLA’05.
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“Adaptive Software
Transactional Memory,” by V. J. Marathe, W. N. Scherer III, and
M. L. Scott.
19th Intl. Symp. on
Distributed Computing (DISC), Cracow, Poland, Sept. 2005.
Earlier version available as
TR 868,
Computer Science Dept., Univ. of Rochester, May 2005.
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“Advanced Contention
Management for Dynamic Software Transactional
Memory,” by W. N. Scherer III and M. L. Scott.
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005.
-
“Using
LL/SC to Simplify Word-based Software Transactional Memory”
(poster paper),
by V. J. Marathe and M. L. Scott.
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005.
-
“Randomization
in STM Contention Management”
(poster paper),
by W. N. Scherer III and M. L. Scott.
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005. Winner, Most Popular Poster Presentation award.
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“Design Tradeoffs in Modern
Software Transactional Memory Systems,” by
V. J. Marathe, W. N. Scherer III, and M. L. Scott.
7th Workshop on Languages, Compilers, and Run-time Support
for Scalable Systems (LCR), Houston, TX, Oct. 2004.
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“Nonblocking Concurrent
Objects with Condition Synchronization,” by
W. N. Scherer III and M. L. Scott.
18th Annual Conf. on
Distributed Computing (DISC), Amsterdam, The Netherlands,
Oct. 2004.
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“Contention
Management in Dynamic Software Transactional Memory,” by
W. N. Scherer III and M. L. Scott.
PODC Workshop on
Concurrency and Synchronization in Java Programs (CSJP),
St. John's, NL, Canada, July 2004. In conjunction with the
23rd
ACM Symp. on Principles of Distributed Computing (PODC).
Please also download the
ERRATA.
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“A Qualitative Survey of Modern
Software Transactional Memory Systems,”
by V. J. Marathe and M. L. Scott. TR 839, Computer Science
Dept., Univ. of Rochester, June 2004.
-
“Software
Transactional Memory for Dynamic-Sized Data Structures,” by
M. Herlihy, V. Luchangco, M. Moir, and
W. N. Scherer III.
22nd ACM Symp. on Principles
of Distributed Computing (PODC), July 2003.
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“Non-Blocking Timeout in Scalable Queue-Based Spin Locks,”
by M. L. Scott.
21st ACM Symp. on Principles
of Distributed Computing (PODC), Monterey, CA, July, 2002.
Expanded version available as
TR 773, Computer Science
Dept., Univ. of Rochester, Feb. 2002.
Presentation slides.
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“Scalable Queue-Based Spin Locks with Timeout,”
by M. L. Scott and W. N. Scherer III.
8th ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), Snowbird, UT, June 2001.
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“Nonblocking Algorithms and Preemption-Safe Locking on Multiprogrammed Shared Memory Multiprocessors,”
by M. M. Michael and M. L. Scott.
J. of Parallel and Distributed Computing, May 1998.
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“Relative
Performance of Preemption-Safe Locking and Non-Blocking
Synchronization on Multiprogrammed Shared Memory
Multiprocessors,”
by M. M. Michael and M. L. Scott.
Proc. of the 11th Intl. Parallel
Processing Symp. (IPPS), Geneva, Switzerland, Apr. 1997.
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“Scheduler-Conscious
Synchronization,”
by L. I. Kontothanassis, R. W. Wisniewski, and M. L. Scott.
ACM Trans. on Computer Systems,
Feb. 1997.
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“An Efficient Algorithm for
Concurrent Priority Queue Heaps”
by G. C. Hunt, M. M. Michael, S. Parthasarathy, and M. L. Scott.
Information Processing Letters, Nov. 1996.
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“Simple, Fast, and
Practical Non-Blocking and Blocking Concurrent Queue Algorithms,”
by M. M. Michael and M. L. Scott.
15th ACM Symp. on Principles of
Distributed Computing (PODC), Philadelphia, PA, May 1996.
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“Concurrent Update on
Multiprogrammed Shared Memory Multiprocessors,”
by M. M. Michael and M. L. Scott.
TR 614, Computer Science Dept., Univ. of Rochester, Apr. 1996.
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“The Topological Barrier: A
Synchronization Abstraction for Regularly-Structured Parallel
Applications,”
by M. M. Michael and M. L. Scott.
TR 605, Computer Science Dept., Univ.
of Rochester, Jan. 1996.
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“Correction of a Memory
Management Method for Lock-Free Data Structures,”
by M. M. Michael and M. L. Scott.
TR 599, Computer Science Dept., Univ. of Rochester, Dec. 1995.
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“High Performance
Synchronization Algorithms for Multiprogrammed Multiprocessors,”
by R. W. Wisniewski, L. I. Kontothanassis, and M. L. Scott.
5th ACM Symp. on Principles and Practice
of Parallel Programming (PPoPP), July 1995.
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“Implementation
of Atomic Primitives for Distributed Shared-Memory
Multiprocessors,”
by M. M. Michael and M. L. Scott.
1st Intl. Symp. on High Performance Computer Architecture (HPCA),
Raleigh, NC, Jan. 1995.
-
“Fast,
Contention-Free Combining Tree Barriers,”
by M. L. Scott and J. M. Mellor-Crummey.
Intl. J. of Parallel Programming, Aug. 1994.
Previous version available as TR 429, Computer Science Dept., Univ. of Rochester, June 1992.
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“Scalable Spin Locks for
Multiprogrammed Systems,”
by R. W. Wisniewski, L. I. Kontothanassis, and M. L. Scott.
8th Intl. Parallel Processing Symp., Apr. 1994.
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“Fast Mutual Exclusion, Even
with Contention,”
by M. M. Michael and M. L. Scott.
TR 460, Computer Science Dept., Univ. of Rochester, June 1993.
-
“Using Scheduler Information
to Achieve Optimal Barrier Synchronization Performance,”
by L. I. Kontothanassis and R. W. Wisniewski.
4th ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), May 1993.
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“Kernel-Kernel
Communication in a Shared-Memory Multiprocessor,”
by E. M. Chaves, P. Ch. Das, T. J. LeBlanc, B. D. Marsh, and M. L. Scott.
Concurrency—Practice and Experience, May 1993.
-
“First-Class
User-Level Threads,”
by B. D. Marsh, M. L. Scott, T. J. LeBlanc, and E. P. Markatos.
ACM Symp. on Operating Systems Principles (SOSP), Pacific Grove,
CA, Oct. 1991.
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“Scalable
Reader-Writer Synchronization for Shared-Memory
Multiprocessors,”
by J. M. Mellor-Crummey and M. L. Scott.
3rd ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), Williamsburg, VA, Apr. 1991.
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“Synchronization Without
Contention,”
by J. M. Mellor-Crummey and M. L. Scott.
4th Intl. Conf. on Architectural Support for Programming Languages
and Operating Systems (ASPLOS), Santa Clara, CA, Apr. 1991.
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“Algorithms for
Scalable Synchronization on Shared-Memory Multiprocessors,”
by J. M. Mellor-Crummey and M. L. Scott.
ACM Trans. on Computer Systems,
Feb. 1991.
Winner, 2006 Edsger
W. Dijkstra Prize in Distributed Computing.
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“Scalable Queue-Based Spin Locks with Timeout,” by
M. L. Scott.
Provisional US patent application filed 1 Mar. 2002; full application
filed 3 Mar. 2003; awarded 15 Sept. 2005.
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“System and Method for Hardware Acceleration of a Software Transactional
Memory,” by
M. L. Scott, S. Dwarkadas, A. Shriraman, and V. Marathe.
Provisional US patent application filed 9 Dec. 2005; full application
filed 10 Dec. 2006.
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